[PATCH] powerpc64/linux: Fix 64-bit process detection for Book III-E

[James Yang]

strace does not detect 64-bit processes on PowerISA Book III-E processors
such as Freescale P5020 and T4240.

The PowerISA Book III-S MSR is different from the PowerISA Book III-E
MSR.  The III-S MSR is 64 bits wide, and its MSR[SF] is the msb (bit 0
of a 64-bit value).  III-E MSR is 32 bits wide, and its MSR[CM] is the
msb (bit 0 of a 32-bit value).

On Linux powerpc 64-bit, ppc_regs.msr is an unsigned long, which is a
64-bit variable.

The III-E MSR[SF] is bit 32 of ppc_regs.msr.
The III-S MSR[CM] is bit 0 of ppc_regs.msr.

This patch adds a test for the bit in ppc_regs.msr corresponding to
III-E's MSR[CM] bit so that 64-bit processes are correctly detected.
---
 syscall.c |   18 ++++++++++++++++--
 1 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/syscall.c b/syscall.c
index 3477dcd..5bf3e5a 100644
--- a/syscall.c
+++ b/syscall.c
@@ -1222,8 +1222,22 @@ get_scno(struct tcb *tcp)
 	int currpers;
 
 	/* Check for 64/32 bit mode. */
-	/* SF is bit 0 of MSR */
-	if ((ppc_regs.msr >> 63) & 1)
+	/* In Book III-S, SF is bit 0 of MSR, which is 64-bits wide.
+	 * In Book III-E, CM is bit 0 of MSR, which is 32-bits wide,
+	 * and it is stored in the lower 32 bits of ppc_regs.msr.
+	 *
+	 * ppc_regs.msr    meaning
+	 * bit 0   bit 32  III-S   III-E
+	 * 0       0       32-bit  32-bit
+	 * 0       1       32-bit  64-bit
+	 * 1       0       64-bit  not possible
+	 * 1       1       64-bit  not possible
+	 *
+	 * In case III-S MSR bit 32 ever becomes a non-reserved bit, test
+	 * ppc_regs.msr bit 0 first since it will always be 0 for III-E.
+	 */
+
+	if (((ppc_regs.msr >> 63) & 1) || (ppc_regs.msr >> 31) & 1)
 		currpers = 0;
 	else
 		currpers = 1;
-- 
1.7.2.5