[SCM] strace branch, master, updated. v4.7-98-g1ba8543
cmetcalf at tilera.com
Tue Mar 5 15:38:33 UTC 2013
On 3/5/2013 9:49 AM, Denys Vlasenko wrote:
> On 03/05/2013 03:19 PM, Chris Metcalf wrote:
>>>>> +#include <sys/user.h> /* for PAGE_SHIFT */
>>>>> #if defined(SH64)
>>>>> -# include <asm/page.h> /* for PAGE_SHIFT */
>>>>> +# include <asm/page.h> /* for PAGE_SHIFT */
>>>>> +#if !defined(PAGE_SHIFT)
>>>>> +# warning Failed to get PAGE_SHIFT, assuming 12
>>>>> +# define PAGE_SHIFT 12
>>>> In glibc, sys/user.h is notoriously incomplete header file containing a
>>>> nice comment that "The whole purpose of this file is for GDB and GDB
>>>> only". In particular, on most of architectures it doesn't define
>>>> PAGE_SHIFT, and on some architectures PAGE_SHIFT is greater that 12.
>>>> I think we should not rely on <sys/user.h>. The natural source of
>>>> PAGE_SHIFT definition seems to be <asm/page.h>; we can either include it
>>>> directly, or, if there is a risk of namespace collisions, fetch PAGE_SHIFT
>>>> during configure stage.
>>> It looks like <asm/page.h> is not usually installed, so another reliable
>>> method is needed.
>> You need to do it at runtime in general, since it's possible to boot some
>> architectures and choose the page size with kernel boot arguments
>> (or kernel build-time configure options). Just multiply by getpagesize()
>> instead of shifting by PAGE_SHIFT.
> Are there guarantees that getpagesize() is the _kernel's_ page size,
> such as: it isn't affected by compat layer?
There is provision in the kernel in fs/compat_binfmt_elf.c for architectures to set COMPAT_ELF_EXEC_PAGESIZE, but it doesn't appear that any architectures do so, so they should report the same page size to userspace for either regular or compat tasks.
Our of curiosity, I looked at the kernel architectures that apparently use page offsets in mmap (based on the strace syscallent.h files) that also have compat support, and it appears to be just x86 and s390, which always have 4K pages for everything, and arm64, which is usually 4K, but supports 64K pages as a kernel build-time configure switch.
Chris Metcalf, Tilera Corp.
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